Samsung Unveils Groundbreaking 3D DRAM Plans, Pioneering Sub 10nm Tech with Vertical Channel Transistors


Samsung has announced plans for 3D DRAM featuring vertical channel transistors (VCT). The company plans to adopt DRAM with VCTs starting from its 1st Generation sub-10nm process technology. Samsung’s latest DRAM production node is its 5th Generation 10nm-class (12nm) tech, introduced in mid-2023.

The 1st Gen sub-10nm node is set to appear in the decade’s second half. DRAMs featuring VCTs and 4F^2 cell design will emerge in 2027-2028. Memory makers will have to adopt new materials for capacitors and bit lines to make VCT-based DRAMs.

Read More : Samsung puts 3D DRAM on the roadmap, stacked DRAM to follow

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